存儲

1.6 MB embedded MLAB (640-bit) SRAM blocks;
6.75 MB embedded M20K (20K-bit) SRAM blocks;
Up to 32 GB DDR3 SDRAM (2x SoDIMMs);
On-board 2 GB DDR3 SDRAM.

性能

Up to 2,713 M20K blocks @ 450 MT/s for total of ~5 TB/s;
DDR3 SDRAM for total at 4.5 GB/s;
DDR3 SDRAM for a total at 17 GB/s
Up to 3,036 18x19 variable precision multipliers.

Board Management

Flexible clocking system;
Temperature monitoring;
Internal voltage monitoring.

總線

PCIe x8 Gen. 3

MTBF

>1.5 million hours

規格

半高PCIe卡

GPIO

12x LVTTL

I/O

3x SFP+, QSFP+ and 2x PHS (Gidel High Speed Connector)

開(kāi)發工(gōng)具

Gidel ProcDev Kit：（for HDL design flow）
1.Generation of environment FPGA code, including all board/IP constrains and user logic wrapper;
2.Generation of dedicated application driver supported by API;
3.Splitting of physical on-board memories into logical memories with independent parallel access to/from user logic.

Intel Tools：

Quartus Prime Pro, including QSys and DSP builder